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756 IP
401
0.118
Standard Cell (ECO) Library IP, HVT, 12 tracks, UMC 28nm HLP process
UMC 28nm HLP/HVT Logic process 12-Track ECO_M1 Core Cell Library (C38)....
402
0.118
Standard Cell (ECO) Library IP, HVT, 12 tracks, UMC 40nm LP process
UMC 40nm LP/HVT Logic process 12-Track high speed ECO_M1 Cell Library (C40)....
403
0.118
Standard Cell (ECO) Library IP, HVT, 12 tracks, UMC 40nm LP process
UMC 40nm LP/HVT Low-K Logic process high performance 12-Track Metal1 Start ECO Core Cell Library....
404
0.118
Standard Cell (ECO) Library IP, HVT, 12 tracks, UMC 55nm LP process
UMC 55nm LP/HVT Low-K Logic process 12-Track ECO Core Cell Library....
405
0.118
Standard Cell (ECO) Library IP, HVT, 7 tracks, UMC 28nm HLP process
UMC 28nm HLP/HVT Logic and Mixed-Mode process 7-Track ECO Cell Library....
406
0.118
Standard Cell (ECO) Library IP, HVT, 7 tracks, UMC 28nm HPC process
UMC 28nm HPC/HVT Logic and Mixed-Mode process 7-Track ECO_M1 Cell Library C35....
407
0.118
Standard Cell (ECO) Library IP, HVT, 7 tracks, UMC 40nm LP process
UMC 40nm LP/HVT Low-K Logic process 7-Track ECO_M1 Cell Library....
408
0.118
Standard Cell (ECO) Library IP, HVT, 7 tracks, UMC 55nm LP process
UMC 55nm LP/HVT Low-K Logic process 7-Track ECO Cell Library....
409
0.118
Standard Cell (ECO) Library IP, HVT, 7 tracks, UMC 55nm SP process
UMC 55nm SP/HVT Logic process 7-Track ECO_M1 Cell Library....
410
0.118
Standard Cell (ECO) Library IP, HVT, 8 tracks, UMC 55nm LP process
UMC 55nm LP/HVT Low-K Logic process 8-Track ECO Core Cell Library....
411
0.118
Standard Cell (ECO) Library IP, HVT, 9 tracks, UMC 28nm HLP process
UMC 28nm HLP/HVT Logic process 9-Track ECO_M1 Core Cell Library....
412
0.118
Standard Cell (ECO) Library IP, HVT, 9 tracks, UMC 40nm LP process
UMC 40nm LP/HVT Logic process 9-Track Standard Cell Library (ECO_M1 Core)....
413
0.118
Standard Cell (ECO) Library IP, HVT, UMC 40nm LP process
UMC 40nm LP/HVT Low-K Logic process ECO_M1 Core Cell Library....
414
0.118
Standard Cell (ECO) Library IP, LVT, 12 tracks, UMC 28nm HLP process
UMC 28nm Logic and Mixed-Mode HLP/LVT process 12-Track ECO_M1 Core Cell Library (C35)....
415
0.118
Standard Cell (ECO) Library IP, LVT, 12 tracks, UMC 28nm HLP process
UMC 28nm HLP/LVT Logic process 12-Track ECO_M1 Core Cell Library (C38)....
416
0.118
Standard Cell (ECO) Library IP, LVT, 12 tracks, UMC 40nm LP process
UMC 40nm LP/LVT Logic process 12-Track high speed Generic ECO_M1 Core Cell Library....
417
0.118
Standard Cell (ECO) Library IP, LVT, 12 tracks, UMC 40nm LP process
UMC 40nm LP/LVT Low-K Logic process high performance 12-Track Metal1 Start ECO Core Cell Library....
418
0.118
Standard Cell (ECO) Library IP, LVT, 12 tracks, UMC 55nm LP process
UMC 55nm LP/LVT Low-K Logic process 12-Track ECO Core Cell Library....
419
0.118
Standard Cell (ECO) Library IP, LVT, 7 tracks, UMC 28nm HLP process
UMC 28nm HLP/LVT Logic and Mixed-Mode process 7-Track ECO Cell Library....
420
0.118
Standard Cell (ECO) Library IP, LVT, 7 tracks, UMC 28nm HLP process
UMC 28nm HLP/LVT Logic and Mixed-Mode process 7-Track ECO Cell Library with LMINUS (C30)....
421
0.118
Standard Cell (ECO) Library IP, LVT, 7 tracks, UMC 28nm HLP process
UMC 28nm HLP/LVT Logic and Mixed-Mode process 7-Track ECO Generic Core Cell Library wtih LPLUS (C38)....
422
0.118
Standard Cell (ECO) Library IP, LVT, 7 tracks, UMC 28nm HPC process
UMC 28nm HPC/LVT Logic and Mixed-Mode process 7-Track ECO_M1 Cell Library (C35)....
423
0.118
Standard Cell (ECO) Library IP, LVT, 7 tracks, UMC 40nm LP process
UMC 40nm LP/LVT Low-K Logic process 7-Track ECO_M1 Cell Library....
424
0.118
Standard Cell (ECO) Library IP, LVT, 7 tracks, UMC 55nm LP process
UMC 55nm LP/LVT Low-K Logic process 7-Track ECO Core Cell Library....
425
0.118
Standard Cell (ECO) Library IP, LVT, 8 tracks, UMC 55nm LP process
UMC 55nm LP/LVT Low-K Logic process 8-Track ECO Core Cell Library....
426
0.118
Standard Cell (ECO) Library IP, LVT, 9 tracks, UMC 28nm HLP process
UMC 28nm HLP/LVT Logic process 9-Track Standard Generic ECO Cell Library (C35)....
427
0.118
Standard Cell (ECO) Library IP, LVT, 9 tracks, UMC 40nm LP process
UMC 40nm LP/LVT Logic process 9-Track Standard Cell Library (ECO_M1 Generic Core)....
428
0.118
Standard Cell (ECO) Library IP, LVT, UMC 40nm LP process
UMC 40nm LP/LVT Low-K Logic process ECO_M1 Core Cell Library....
429
0.118
Standard Cell (ECO) Library IP, RVT, 12 tracks, UMC 28nm HLP process
UMC 28nm Logic and Mixed-Mode HLP/RVT process 12-Track ECO_M1 Cell Library (C35)....
430
0.118
Standard Cell (ECO) Library IP, RVT, 12 tracks, UMC 28nm HLP process
UMC 28nm HLP/RVT Logic process 12-Track ECO_M1 Core Cell Library (C38)....
431
0.118
Standard Cell (ECO) Library IP, RVT, 12 tracks, UMC 40nm LP process
UMC 40nm LP/RVT Logic process 12-Track high speed ECO_M1 Cell Library (C40)....
432
0.118
Standard Cell (ECO) Library IP, RVT, 12 tracks, UMC 40nm LP process
UMC 40nm LP/RVT Low-K Logic process high performance 12-Track Metal1 Start ECO Core Cell Library....
433
0.118
Standard Cell (ECO) Library IP, RVT, 12 tracks, UMC 55nm LP process
UMC 55nm LP/RVT Low-K Logic process 12-Track ECO Core Cell Library....
434
0.118
Standard Cell (ECO) Library IP, RVT, 7 tracks, UMC 28nm HLP process
UMC 28nm HLP/RVT Logic and Mixed-Mode process 7-Track ECO Cell Library....
435
0.118
Standard Cell (ECO) Library IP, RVT, 7 tracks, UMC 28nm HLP process
UMC 28nm HLP/RVT Logic and Mixed-Mode process 7-Track ECO Cell Library with LMINUS (C30 RVT)....
436
0.118
Standard Cell (ECO) Library IP, RVT, 7 tracks, UMC 28nm HLP process
UMC 28nm HLP/RVT Logic and Mixed-Mode process 7-Track ECO Cell Library with LPLUS (C38)....
437
0.118
Standard Cell (ECO) Library IP, RVT, 7 tracks, UMC 28nm HPC process
UMC 28nm HPC/RVT Logic and Mixed-Mode process 7-Track ECO_M1 Cell Library (C35)....
438
0.118
Standard Cell (ECO) Library IP, RVT, 7 tracks, UMC 40nm LP process
UMC 40nm LP/RVT Low-K Logic process 7-Track ECO_M1 Cell Library....
439
0.118
Standard Cell (ECO) Library IP, RVT, 7 tracks, UMC 55nm LP process
UMC 55nm LP/RVT Low-K Logic process 7-Track ECO Cell Library....
440
0.118
Standard Cell (ECO) Library IP, RVT, 7 tracks, UMC 55nm SP process
UMC 55nm SP/RVT Logic process 7-Track ECO_M1 Cell Library....
441
0.118
Standard Cell (ECO) Library IP, RVT, 8 tracks, UMC 55nm LP process
UMC 55nm LP/RVT Low-K Logic process 8-Track ECO Core Cell Library....
442
0.118
Standard Cell (ECO) Library IP, RVT, 9 tracks, UMC 28nm HLP process
UMC 28nm Logic and Mixed-Mode HLP/RVT process 9-Track ECO_M1 Cell Library (C35)....
443
0.118
Standard Cell (ECO) Library IP, RVT, 9 tracks, UMC 28nm HLP process
UMC 28nm HLP/RVT Logic process 9-Track ECO_M1 Core Cell Library (C38)....
444
0.118
Standard Cell (ECO) Library IP, RVT, 9 tracks, UMC 40nm LP process
UMC 40nm LP/RVT Logic process 9-Track Standard Cell Library (ECO_M1 Core)....
445
0.118
Standard Cell (ECO) Library IP, RVT, UMC 40nm LP process
UMC 40nm LP/RVT Low-K Logic process ECO_M1 Core Cell Library....
446
0.118
Standard Cell (ECO) Library IP, RVT, UMC 55nm SP process
UMC 55nm SP/RVT Low-K Logic process Mini-Library Metal1 Start ECO Core Cell Library....
447
0.118
Standard Cell (ECO) Library IP, RVT, UMC 65nm SP process
metal-1 start Gate Array ECO Library for UMC 65nm SP/RVT(FSE0A_D)....
448
0.118
Standard Cell (ECO) Library IP, RVT, UMC 90nm SP process
UMC 90nm SP/RVT Low-K Logic process ECO Cell Library....
449
0.118
Standard Cell (ECO) Library IP, UMC 0.11um HS/FSG process
UMC 0.11um HS FSG Logic process ECO Cell Library....
450
0.118
Standard Cell (ECO) Library IP, UMC 0.11um HS/FSG process
UMC 0.11um HS/FSG Logic process Metal1 Start ECO Core Cell Library (for FSR0H_M)....
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